Board Assembly

Vision

Board assembly plays a critical role in electronics manufacturing by attaching components and boards together in a repeatable and reliable way. With increased miniaturization and densification of components and assemblies board assembly is becoming more challenging. For Assembly materials, the smaller spacings challenge the reliability of the materials used with ongoing developments in low-voiding, low-temperature and high-reliability assembly materials. Regulatory impacts in terms of the materials that can be used are affecting materials development.  

Regulations are also resulting in the development of reflow ovens to address sustainability and energy consumption needs (such as the need for less N₂, power consumption, etc., with a lower carbon footprint).

Reflow oven considerations include a demand for higher throughout/conveyor speed ovens, the development of different heating methods to address the challenge to reduce voiding and the need to reduce the Delta T across the product board and limit reflow times, as well as the development of improved flux extraction techniques for reflow ovens. Clean vs. no-clean materials’ have different concerns. Concerns with electrochemical or corrosion issues with no-clean residues left on the board vs.  concerns with cleaning process efficacy (especially prior to conformal coating application).

Printing equipment considerations include stencil development for stencils used in the printing machine to improve print quality of small apertures for mixed component applications and laser-cut stencil fabrication improvements (which would include step stencil print quality enhancement) and the need to increase automation in the printing process (e.g., changeover, process control and changeability, etc.).

As designs produce assemblies with miniaturized components with tighter component spacings and with the advent of larger components the challenges for rework and repair are also increasing.  Rework and repair (and indeed reuse) considerations need to be incorporated in design for manufacturing (DFM) considerations.

Test design (printed circuit assembly functional and/or in circuit test) is a major challenge with miniaturization and densification (having adequate space for test point coverage).

Some designs, such as for LEDS that are highly temperature-sensitive, involve step soldering. Step soldering increases manufacturing complexity due to the additional process step and assembly materials.

Designers also need to be more aware of the challenges in board assembly and rework and repair in order for manufacturing issues to be reduced.

Scope

The iNEMI Board Assembly Roadmap is organized under the following technology areas:  

• Assembly Materials

• Surface Mount Technology (SMT) Process (Printing and Reflow)

• Component/Part Placement

• Wave-Selective Soldering

• Rework and Repair

• Press-fit

• Central Process Unit (CPU) Sockets

Market trends and applications

Board assembly is driven by various factors that include the following:

Miniaturization of components

As parts become smaller, they become more challenging to assemble and rework especially in combination with larger parts assembled on the same board.

Densification of components and boards and board assemblies

With the combination of smaller and larger parts on the board, with smaller spacings between them, assembly becomes more challenging in terms of deposition/printing of attachment assembly materials onto the board pads. With reduced spacings, reliability of the assembly materials used is more of a concern.

Increase in the use of larger components

Certain components sizes are also becoming larger with challenges in component warpage during reflow. The combination of larger and smaller parts on the same board with reduced spacing between parts is also causing challenges in terms of assembly and rework and repair.

Board design 

As board assemblies become more dense, board design becomes a critical input into the board pad designs used for components, the spacing between components and placement of parts on both sides of the board to enable good manufacturing yield and reliability. This is challenged by the development of new components with limited manufacturing assessments on them which lead to issues in manufacturing and rework and repair.

Today’s Landscape/Technology Segments

Assembly Materials

Critical materials include solder fluxes, solder pastes including joint reinforcement paste (JRP), solder alloys, rework materials, and the combination of these used in board assembly operations as well as conformal coatings, underfills, and encapsulants/ potting materials.  Thermal interface materials are also considered. Key drivers for the technology development of these materials include:

1. Component miniaturization and reduced board spacings driving finer paste types and paste printing/rework challenges

2. Low voiding materials for solder pastes and thermal interface materials (TIMs)

3. A wide variety of thermal and mechanical stress conditions during transportation and reflow, test, and assembly and end-customer usage (typical and worst-case).

4. The ever present need for improved overall hardware reliability in a wide range of end-user environments (high and low temperatures, humidity levels, pollutants or contamination such as sulfur or dust)

5. Regulatory impacts on material developments (recycled tin, considered restriction of solder elemental additions, flux constituents)

6. Lower temperature assembly materials

Processability and reliability of assembly materials will become increasingly important with miniaturization of components, densification of assemblies and the mix of larger and smaller component on the same board.

A detailed view of the needs, gaps, challenges and technology solutions for this topic is given here at this link.

SMT Process (Printing and Reflow)

For the operation of reflow ovens, the focus is to improve productivity, increase flexibility in heating zones, reduce operational costs, and enhance sustainability and reduce energy consumption. These demands include higher throughout/conveyor speed ovens, lower voiding during reflow and different types of heating methods to address reducing Delta T between small and large components. These should be optimized while maintaining acceptable post-SMT solder joint quality across the wide variation in type and size of components being soldered.

For the operation of printing equipment the focus is on development of stencils used in the printing equipment to improve print quality of small stencil apertures on mixed component applications and improvement of laser-cut stencil fabrication methods and step stencil print quality. Printing equipment development is also being driven by the need to increase automation in the printing and print inspection processes (such as changeover, process control and changeability, etc.) with less manual operation. A detailed view of the needs, gaps, challenges and technology solutions for this topic is given here at this link.

Component Placement

Information on the drivers, needs, and challenges is currently being collected and will be published in 1Q2025.  If you are interested in being notified when this is released, please email here.

Wave-Selective Soldering

Information on the drivers, needs, and challenges is currently being collected and will be published in 1Q2025.  If you are interested in being notified when this is released, please email here.

Rework and Repair

Rework and repair processes consist of hand soldering, plated-through-hole (PTH) rework and ball grid array (BGA) rework. Evolving challenges for rework and repair include the following:

1. The increasing miniaturization of devices (e.g., 01005/0402 metric and smaller size chips, quad-flat no-leads (QFN)/bottom terminated component (BTC)/dual-flat no-leads (DFN) micro-packages, etc.) and increasing density of components and interconnects on a board

2. The proliferation of new device types (e.g., large BGAs and their sockets, single-piece radio frequency (RF) shields) and rework and repair issues with certain board assembly materials (e.g., conformal coatings, underfill materials, etc.)

3. Heat flow difficulties arising from temperature-sensitive components and high-thermal mass boards

4. Incomplete data from component suppliers and a lack of consideration of rework and repair issues during component design.

The increased density of components on the board are leading to issues such as rework causing adjacent components to reflow or partially reflow—leading to potential reliability issues with  thermal modelling needed at the design level to understand and address these issues. For mirror-imaged component rework, development of design software is needed to understand the risks associated with mirror-imaged component rework and what is feasible and what is not.

A detailed view of the needs, gaps, challenges and technology solutions for this topic is given here at this link.

Press Fit

Press fit technology that is used in printed circuit board assembly applications continues to be a strong, dependable, and reliable interconnect for electronic product applications. Press-fit compliant pins are used on backplanes, mid-planes and daughter card connectors. While faster bandwidth and signal integrity speeds are being achieved today, continued enhancement on interconnect designs and materials need further development to continue apace for faster systems performance.

The roadmap focus for press fit is on the following:

1. The impact of increasing line speeds (e.g., press fit tails acting as antennas)

2. Automation in manufacturing

3. Bent compliant pins

4. Standardized rework methods

5. Automated optical and X-ray inspection

6. Maintaining electrical connectivity in the presence of warpage

A detailed view of the needs, gaps, challenges and technology solutions for this topic is given here at this link.

CPU Sockets

Future CPU socket technology needs—especially for data center applications—are driven based on the following key industry technology trends:

1. Exponential trend in pin count scaling

2. Increasing land grid array (LGA) socket mechanical loading. This increase in load drives enabling hardware complexity, costs and motherboard keep out areas.

3. Limited pin pitch reductions. This limitation is driving bigger sockets and CPU packages.

4. Increase in memory and high-speed I/O data rates. Data rate increases are forcing lower height sockets to meet high-speed signaling integrity requirements. 

5. Increasing per pin current carrying capability requirements to meet CPU die/package power delivery requirements.

To mitigate socket warpage, the injection molding tool design such as gate numbers, locations, molding conditions and housing part feature design should be optimized. Dividing large sockets into two or more pieces would also reduce concerns about warpage. As socket height reduces over time, the material strength of the contact base metal needs to improve, also aiding socket flatness.

The requirement for the contact to be more compliant is not good for signal integrity performance in general.  Under limitations of geometry and part design, certain design optimization can be done, such as in material selection, socket manufacturability and pin arm length versus signal integrity. In addition, current density per pin will be increased to satisfy signal and power integrity needs. Different geometries and materials for signal and power integrity are under research and development to satisfy these requirements.

A detailed view of the needs, gaps, challenges and technology solutions for this topic is given here at this link.

Board Assembly Acronyms