High Speed Substrates

Introduction

Organic substrates are widely used as carriers for semiconductor integrated circuits such as microprocessors, graphics processors, field-programmable gate arrays (FPGAs), and memories. Semiconductor package substrates can be divided into general purpose semiconductor package substrates, tape-automated bonding (TAB) carriers, and chip-on-film (COF) carriers (see Figure 1). Organic substrates are made by printed wiring board-based technologies used for semiconductor device packaging, and are separate from the choice of semiconductor package or semiconductor device type. It is also classified into interposer and substrate according to role played in a given semiconductor package (see Figure 2).

Needs, Gaps, Challenges, and Potential Solutions

Raw Materials

Every component used in high-speed substrates is now critical in achieving the overall composite electrical performance requirements. The dielectric constants (Dk) and especially the loss tangent (Df) properties of the polymers, flame retardants, fillers and reinforcements used in the laminates, prepregs and bonding layers used to build high-speed printed circuits must be engineered precisely. Materials with lower Df values are needed, and in many cases lower Dk is desirable. However, in some applications, it is important to require Dk values that are consistent across all relevant frequency, temperature, and humidity conditions.

As operating frequencies continue to increase, conductor losses begin to dominate system performance, creating challenges and gaps for copper foil manufacturers.  Copper foil manufacturers must develop grades with extremely low surface profiles, controlled grain sizes and treatments.  They need to develop bonding agents that provide not just the required electrical performance, but also maintain the reliability of the bond between the foil and the dielectric.  

While improvements in woven-glass cloth technology have already been made, challenges in scale-up and cost structure remain.  And while lower Dk glass fabrics and improved filament spreading have helped mitigate electrical skew issues due to Dk differences in the glass reinforcement vs. the polymer matrix, further improvements are needed, with non-woven reinforcements, unreinforced film-based dielectrics and Dk adjustment of the polymer matrix as potential solutions.

The substrate materials for the signal layers are generally epoxy films filled with fillers to reduce the coefficient of thermal expansion to ≤50 ppm/K, or prepregs made of glass cloth impregnated with epoxy resin to ensure rigidity. In addition, some printed wiring board (PWB) processes have combined the redistribution layer (RDL) formation method used in the semiconductor back-end process with the PWB process to achieve sub-10 µm conductor width/spacing.

Manufacturing Processes

 In the manufacturing of copper-clad laminates, prepregs and bond plies, the need for tighter dielectric thickness control in very thin layers will continue to be a challenge for controlling to precise impedance targets and loss budgets.  And as circuit density increases and feature distances continue to shrink, the importance of dimensional stability and predictability of the substrate materials in order to meet multilayer circuit registration requirements continues to increase.

The interaction of substrate material properties with circuit manufacturing processes also presents challenges:

• Relative to high-speed performance, interlayer copper surface preparation prior to multilayer pressing is a critical process.  Oxide alternative processes that minimize surface roughness while providing reliable bonding to high speed prepregs and films are needed. 

• The behavior of the dielectric material in mechanical and laser drilling, and in the desmear and metallization processes that follow can also be challenging with high-speed/low loss materials.

• Materials specifically designed for semi-additive and fully additive processes will be needed, particularly with UHDI (ultra-high density interconnect) and SLP (substrate-like PCB) designs.

Reliability

Trends in operating frequencies, voltage and power requirements, resulting in higher operating temperatures, continue to create needs for better thermomechanical reliability and oxidative stability.  Substrate materials with lower coefficients of thermal expansion (CTE), higher glass transition temperature (Tg) and decomposition temperature (Td) are needed.  The higher temperatures generated by these systems and the use in harsh environments are also driving the need for new materials possessing higher thermal conductivity.

Higher voltages, harsh environments and greater circuit density all create needs for improved CAF (conductive anodic filament) resistance.  In addition, the use of extremely low-profile copper foils have led to an increase of bond line CAF formation.  Bond line CAF formation occurs at the interface of the etched laminate surface and the adjacent prepreg or bond film.   

Additionally, warpage of substrates due to thermal expansion is challenging thin substrates such as those in FC-CSPs (flip-chip chip-scale package): materials’ thermal expansion properties need to be improved.

PCB Substrates Technical Needs, Gaps and Solutions

The technology issues surrounding PCB High Speed Substrates, the associated needs, technology status of those needs, as well as gaps and challenges to overcome, are summarized below. The time period considered is from 2023 to 2033.

Some definitions:

Technology Status Legend

For each need, the status of today’s technology is indicated by label and color as follows:

Table 1. PCB High Speed Substrates, Gaps, and Today’s Technology Status with Respect to Current and Future Needs

Approaches to address Needs, Gaps and Challenges

Table 2 considers approaches to address the above needs and challenges. The evolution of these is projected out over a 10-year timeframe using technology readiness levels (TRLs).

Table 2. PCB High Speed Substrates Potential Solutions

Conclusions

High-speed substrate boards are the future of integrated systems, but the transition requires significant investment and new manufacturing technologies:

• As data rates and functionality increase, miniaturization and complex stacking structures challenge PCB manufacturing technology development and overall manufacturing process cleanliness.

• Substrate-level solutions go beyond traditional PCBs, using sophisticated processes like semi-additive processes (SAP) and even fully additive processes.

• The miniaturization and requirement for better tolerances in high-speed applications increase the importance of lower CTE dielectric materials development and usage.

• One hurdle to overcome is achieving these improvements on larger-sized production panels, termed "large format miniaturization."

In summary, high-speed substrate boards evolve rapidly, addressing diverse applications. Stakeholders must stay updated, invest in R&D, and collaborate to conquer miniaturization, materials, and industry shifts. Success depends on innovation, adaptability, and forward-thinking tech solutions.

PCB Acronyms

References

1. iNEMI, Reliability & Loss Properties of Copper Foils for 5G Applications, https://www.inemi.org/article_content.asp?adminkey=b5202baac78313e4914809b2f481b372&article=209, 2021-2023.

Return to PCB Overview